Frequency SynthesisPLLVCOPhase Noise

Phase-Locked Loops (PLL)

A PLL is like a musician who listens to a metronome and constantly adjusts their tempo to stay perfectly in sync — that's how radios generate stable frequencies.

PLL Block Diagram
Animated PLL showing the VCO hunting and locking to the reference. The purple dot represents the control signal flowing around the feedback loop.
f_refReference Osc.PhaseDetectorVerrLoopFilterVCOf_out÷ NDividerACQUIRING...PLL block diagram — feedback forces f_out/N = f_ref, so f_out = N × f_ref
PLL Deep Dive

Key PLL Specifications at a Glance
Phase noisedBc/Hz @ offset

Spectral purity of output. Lower (more negative) is better. Critical for receiver sensitivity.

Reference spursdBc

Discrete spurious tones at ±f_ref offsets. Should be < −70 dBc for most applications.

Lock timeµs / ms

Time from channel change to stable output. Critical for FHSS and radar.

Loop bandwidthkHz

Controls noise optimisation crossover and transient settling speed.

Tuning rangeMHz or GHz

Range over which the VCO and loop can operate. Determined by VCO varactor and bias range.

Frequency resolutionHz

Smallest frequency step. = f_ref for integer-N; sub-Hz for fractional-N with Σ-Δ.